Gera is a component of the Leibniz subsystem that allows masking individual bits of the digital data by the use of logical AND operation. It features 8 individual gate inputs that affect the individual bits of data, as well as 8 illuminated tact switches for manual inverting of each control input. When connected to Drezno that is processing a waveform or voltage, masking of individual bits yields various forms of quantization.
Bit processing logic in Gera is hardware based, hence there is virtually no latency, and the binary signals may change at extreme rates.
Dimensions
6 HP
30 mm deep
Product Overview
Gera is a component of the Leibniz subsystem that allows masking individual bits of the digital data by the use of logical AND operation. It features 8 individual gate inputs that affect the individual bits of data, as well as 8 illuminated tact switches for manual inverting of each control input. When connected to Drezno that is processing a waveform or voltage, masking of individual bits yields various forms of quantization.
Bit processing logic in Gera is hardware based, hence there is virtually no latency, and the binary signals may change at extreme rates.
